BENTLY 330130-080-00-00位置监测器
MC68060微处理器是MVME177。超标量MC68060处理器具有：❏ 两个兼容MC68040的CPU integer内核❏ MC68040兼容浮点核❏ 独立8KB指令和操作数数据缓存❏ MC68040兼容分页内存管理单元❏ 总线控制器处理器位于PGA插槽中。其时钟速度为50 MHz（对于-00x型号）和60 MHz（适用于-01x型号）。请注意，本地处理器总线的运行速度只有处理器速度的一半。请参阅有关更多信息，请参阅MC68060用户手册。
BENTLY 330130-080-00-00位置监测器闪存和EPROM闪存MVME177包括四个28F008SA闪存设备。这个闪存设备提供4MB ROM，地址为FF800000美元-$FFBFFFFF。闪存被组织为一个32位组，用于32位从处理器执行代码。例如，闪光灯可能是用于板载调试器固件（177Bug），该固件将从输入/输出资源下载，例如：❏ 以太网❏ SCSI❏ 串行端口，或❏ VMEbus当闪存与EPROM一起使用时，其顶部或底部2MB闪存在安装后的第二个2MB内存空间中可用EPROM。见下表4-1。由于只使用1M x 8位闪存芯片，因此不需要用户配置跳线选择块来选择闪存芯片大小闪存设备的内存映射由VMEchip2专用集成电路。32位宽闪存可以支持：
❏ 8位❏ 16位，和❏ 32位访问闪存写保护可通过VMEchip2编程GPIO寄存器。Flash的地址图位置为$000000如果FLASHJP跳线（J8）在，则在本地重置时通过3FFFFF，提供全闪光模式。在混合EPROM/闪存中模式下，在20万美元到20万美元的地址可以访问一半的闪存$3FFFFF，取决于VMEchip2 GPIO2位的条件。因为MVME177使用1M x 8位闪存设备和没有下载ROM的EPROM，软件编程VMEchip2 ROM0和REV EROM位正确，以便通电后，闪存/EPROM出现在地址$0处。
MC68060 MPU
The MC68060 microprocessor is the main processor for the
MVME177. The superscalar MC68060 processor has:
❏ Two MC68040-compatible CPU integer cores
❏ MC68040-compatible floating point core
❏ Independent 8KB instruction and operand data caches
❏ MC68040-compatible paged memory management unit
❏ A bus controller
The processor is in a PGA socket. Its clock speed is 50 MHz (for the
-00x models), and 60 MHz (for the -01x models). Note that the local
processor bus runs at only half the processor speed. Refer to the
MC68060 user's manual for more information.
Flash Memory and EPROM
Flash Memory
The MVME177 includes four 28F008SA Flash memory devices. The
Flash devices provide 4MB of ROM at address $FF800000-
$FFBFFFFF. The Flash is organized as one 32-bit bank for 32-bit
code execution from the processor. The Flash could, for instance, be
used for the onboard debugger firmware (177Bug) which would be
downloaded from I/O resources such as:
❏ Ethernet
❏ SCSI
❏ A serial port, or
❏ The VMEbus
When Flash is used with EPROM, either the top or bottom 2MB of
Flash is available in the second 2MB of memory space after the
EPROM. Refer to Table 4-1 below. Because only 1M x 8-bit Flash chips are used, there is no userconfigured jumper selection block required to pick the Flash chip
size.
The memory map for the Flash devices is controlled by the
VMEchip2 ASIC. The 32-bit wide Flash can support:
❏ 8 bit
❏ 16 bit, and
❏ 32 bit access
Flash write protection is programmable through the VMEchip2
GPIO register. The address map location of Flash is at $000000
through $3FFFFF at local reset if the FLASHJP jumper (J8) is in,
providing for the all-Flash mode. In the mixed EPROM/Flash
mode, half of the Flash is accessable at addresses $200000 through
$3FFFFF, depending on the condition of the VMEchip2 GPIO2 bit.
Because the MVME177 uses 1M x 8-bit Flash memory devices and
EPROMs with no download ROM, the software programs the
VMEchip2 ROM0 and REV EROM bits properly so that the
Flash/EPROM appears at address $0 after powerup.
