EMERSON 1C31107G02数字输入模块
摩托罗拉程序员应该注意，英特尔处理器有一条完全独立于内存总线的I/O总线。本手册中已尽一切努力通过引用I/O空间中的寄存器和逻辑实体（通过前缀I/O地址）来阐明这一点。因此，“I/O$140”处的寄存器与“$140”的寄存器不同，因为后者在内存总线上，而前者在I/O总线上。•英特尔程序员应注意，本手册中列出的地址使用的是线性“平面内存”模型，而不是与英特尔实模式编程相关的旧段：偏移模型。因此，位于段：偏移地址C000:0的ROM芯片将在本手册中列为地址$C000000。作为参考，这里有一些快速转换公式：段：偏移到线性地址线性地址=（段×16）+偏移到段的线性地址：偏移段=（（线性地址÷65536）−余数）×4096偏移=余数×65536其中余数=（线性地址？65536）的小数部分
Motorola programmers should note that Intel processors have an I/O bus that
is completely independent from the memory bus. Every effort has been made in
the manual to clarify this by referring to registers and logical entities in I/O
space by prefixing I/O addresses as such. Thus, a register at “I/O $140” is not
the same as a register at “$140,” since the latter is on the memory bus while the
former is on the I/O bus.
• Intel programmers should note that addresses are listed in this manual using a
linear, “flat-memory” model rather than the old segment:offset model
associated with Intel Real Mode programming. Thus, a ROM chip at a
segment:offset address of C000:0 will be listed in this manual as being at
address $C0000. For reference, here are some quick conversion formulas:
Segment:Offset to Linear Address
Linear Address = (Segment × 16) + Offset
Linear Address to Segment:Offset
Segment = ((Linear Address ÷ 65536) − remainder) × 4096
Offset = remainder × 65536
Where remainder = the fractional part of (Linear Address ÷ 65536)
