ICS TRIPLEX T8831工业自动化卡件
CRC-16算法本质上将整个数据流（仅数据位；忽略开始、停止和奇偶校验）视为一个连续的二进制数。该数字首先左移16位，然后除以特征多项式（11000000000101B）。除法的16位剩余部分被附加到传输的末尾，首先是LSByte。如果没有发生传输错误，则当在接收机处用相同的多项式除时，包括CRC的结果消息将给出零余数。如果469 Modbus从设备接收到CRC-16计算指示错误的传输，则从设备不会对传输做出响应。CRC-16错误表示错误接收了传输的一个或多个字节，因此应忽略整个传输，以避免469执行任何错误操作。CRC-16计算是用于错误检测的行业标准方法。在没有标准CRC-16计算例程可用的情况下，这里包括一种算法来帮助程序员。主查询消息：从属地址：（1字节）功能代码：（1个字节）数据：（取决于功能代码的可变字节数）CRC：（2个字节）从属响应消息：从属位置：（1位字节）功能码：（1）字节数据：（根据功能代码的变化字节数）CRC:（2字节）GE Power Management 469 Motor Management Relay 6-3 6 COMMUNICATIONS 6.1 MODBUS COMMUNICATION 6 6.1.5CRC-16算法一旦完成以下算法，工作寄存器“A”将包含要传输的CRC值。注意，该算法要求特征多项式是反向位序的。特征多项式的MSbit被丢弃，因为它不影响余数的值。符号：-->数据传输A个16位工作寄存器，A个CRC 16位CRC-16结果i的A个高阶字节的低阶字节，j个循环计数器（+）逻辑异或运算符N数据字节总数Di第i个数据字节（i=0到N-1）G 16位特征多项式=1010000000000001（二进制），MSbit被丢弃，位序反转shr（x）右移运算符（x的LSbit被移位为进位标志，“0”被移位为x的MSbit，所有其他位被右移一个位置）算法：1。FFFF（十六进制）-->A 2。0-->i 3。0-->j 4。Di（+）Alow-->Alow 5。j+1-->j6。shr（A）7。有行李吗？否：转至步骤8。是：G（+）A-->A并继续。8.j=8吗？否：转到5。是：继续。9.i+1-->i10。i=N？否：转到3。是：继续。11.-->CRC 6.1.6定时数据包同步由定时约束保持。接收设备必须测量接收字符之间的时间。如果经过三个半字符的时间，没有新的字符或数据包没有完成，则必须重置通信链路（即所有从设备开始侦听来自主设备的新传输）。因此，在9600波特时，大于3.5×1/9600×10=3.65 ms的延迟将导致通信链路复位.
The CRC-16 algorithm essentially treats the entire data stream (data bits only; start, stop and parity ignored) as one continuous binary number. This number is first shifted left 16 bits and then divided by a characteristic polynomial (11000000000000101B). The 16-bit remainder of the division is appended to the end of the transmission, LSByte first. The resulting message including CRC, when divided by the same polynomial at the receiver will give a zero remainder if no transmission errors have occurred. If an 469 Modbus slave device receives a transmission in which an error is indicated by the CRC-16 calculation, the slave device will not respond to the transmission. A CRC-16 error indicates than one or more bytes of the transmission were received incorrectly and thus the entire transmission should be ignored in order to avoid the 469 performing any incorrect operation. The CRC-16 calculation is an industry standard method used for error detection. An algorithm is included here to assist programmers in situations where no standard CRC-16 calculation routines are available. MASTER QUERY MESSAGE: SLAVE ADDRESS: (1 byte) FUNCTION CODE: (1 byte) DATA: (variable number of bytes depending on FUNCTION CODE) CRC: (2 bytes) SLAVE RESPONSE MESSAGE: SLAVE ADDRESS: (1 byte) FUNCTION CODE: (1 byte) DATA: (variable number of bytes depending on FUNCTION CODE) CRC: (2 bytes) GE Power Management 469 Motor Management Relay 6-3 6 COMMUNICATIONS 6.1 MODBUS COMMUNICATIONS 6 6.1.5 CRC-16 ALGORITHM Once the following algorithm is complete, the working register "A" will contain the CRC value to be transmitted. Note that this algorithm requires the characteristic polynomial to be reverse bit ordered. The MSbit of the characteristic polynomial is dropped since it does not affect the value of the remainder. Symbols: --> data transfer A 16 bit working register Alow low order byte of A Ahigh high order byte of A CRC 16 bit CRC-16 result i, j loop counters (+) logical EXCLUSIVE-OR operator N total number of data bytes Di i-th data byte (i = 0 to N-1) G 16 bit characteristic polynomial = 1010000000000001 (binary) with MSbit dropped and bit order reversed shr (x) right shift operator (the LSbit of x is shifted into a carry flag, a '0' is shifted into the MSbit of x, all other bits are shifted right one location) Algorithm: 1. FFFF (hex) --> A 2. 0 --> i 3. 0 --> j 4. Di (+) Alow --> Alow 5. j + 1 --> j 6. shr (A) 7. Is there a carry? No: go to step 8. Yes: G (+) A --> A and continue. 8. Is j = 8? No: go to 5. Yes: continue. 9. i + 1 --> i 10. Is i = N? No: go to 3. Yes: continue. 11. A --> CRC 6.1.6 TIMING Data packet synchronization is maintained by timing constraints. The receiving device must measure the time between the reception of characters. If three and one half character times elapse without a new character or completion of the packet, then the communication link must be reset (i.e. all slaves start listening for a new transmission from the master). Thus at 9600 baud a delay of greater than 3.5 × 1 / 9600 × 10 = 3.65 ms will cause the communication link to be reset
