IS200ISBEH1ABC模块备件,模拟量输入模块
VMIVME-7750 VMEbus接口由围绕Tundra Semiconductor Corporation Universe II VMEbus界面芯片构建的PCI到VMEbus桥接器提供。Universe II在一个设计中提供了可靠的高性能64位VMEbus到PCI接口。基于Universe的VMEbus接口的功能和编程在标题为：VMIC Tundra Universe II based VMEbus interface Product manual（500-000211-000）的配套手册中详细介绍。55 I2C支持3 I 2C支持VMIVME-7750支持I2C总线，并且可以根据Philips Semiconductor开发的I2C总线规范2.0版作为I2C总线主设备或从设备运行。通过使用National Semiconductor Super I/O I2C总线控制器实现I2C总线上的通信。该控制器能够使用中断或轮询握手在I2 C总线上进行字节通信，并在主模式下运行时支持可编程时钟速率。I2C总线信号可通过VMIVME-7750的E17标头获得，如表3-1所示。VMIVME-7750提供I2C信号的端接。当在I2C总线上握手时，控制器可以向VMIVME-7750发出中断。当I2C总线控制器驱动中断激活时，软件必须进行服务，然后清除中断。软件可以通过读取状态寄存器的位来确定中断的原因。有关I2 C总线控制器编程的更多信息，请参阅National Semiconductor提供的“PC87366 128引脚LPC Super I/O with System Hardware Monitoring and MIDI and Game Ports”数据表中的“Access，bus Interface（ACB）”一节。表3-1 I 2C总线通过E17信号名称引脚+5.0V 1 I2C_SDA 2 I2C_SCL 3 GND 4 56 3 VMIVME-7750产品手册嵌入式PCI功能VMIVME-7720通过PCI总线提供非易失性RAM（NVRAM）、计时器和看门狗计时器。嵌入式和实时应用程序需要这些功能。这些嵌入式功能的PCI配置空间如下所示。“设备ID”字段表示该设备用于VME产品（00），并表示支持的嵌入式功能集。“供应商ID”和“子系统供应商ID”字段表示VMIC的PICMG分配的供应商ID（114A）。“子系统ID”字段表示产品的型号（7750）。表3-2 PCI配置空间寄存器31 16 15 00寄存器地址设备ID 0004供应商ID 114A 00h状态命令04h类代码修订ID 08h BIST报头类型延迟计时器缓存线大小0Ch PCI基本地址0用于内存映射VME控制寄存器（BAR0）10h PCI基址1用于内存映射32kB NVRAM（BAR1）14h PCI基地址2用于内存映射看门狗和其他计时器（BAR2）18h保留1Ch保留20h保留24h保留28h子系统ID 7750子系统供应商ID 114A 2Ch保留30h保留34h保留38h Max_Lat Min_gnt中断引脚中断线3Ch 57定时器3定时器通用VMIVME-7750提供四个用户可编程定时器（两个16位和两个32位），它们完全专用于用户应用程序，任何标准都不需要系统功能。每个定时器由独立的发生器计时，频率可选择为2MHz、1MHz、500kHz和250kHz。每个定时器可以独立启用，并且每个定时器都能够在超时时生成系统中断。事件可以通过轮询计时器或启用计时器的中断功能来计时。状态寄存器允许应用软件确定哪个定时器是任何中断的原因。计时器控制状态
The VMIVME-7750 VMEbus interface is provided by the PCI-to-VMEbus bridge built around the Tundra Semiconductor Corporation Universe II VMEbus interface chip. The Universe II provides a reliable high-performance 64-bit VMEbus-to-PCI interface in one design. The functions and programming of the Universe-based VMEbus interface are addressed in detail in a companion manual titled: VMIC’s Tundra Universe II Based VMEbus Interface Product Manual (500-000211-000). 55 I2C Support 3 I 2C Support The VMIVME-7750 supports the I2C-bus and can operate as an I2C-bus master or slave per the I2 C-bus specification, version 2.0, developed by Philips Semiconductor. Communication over the I2C-bus is accomplished through the use of the National Semiconductor Super I/O I2C-bus controller. This controller is capable of communicating on the I2 C-bus on a byte-wise basis using interrupt or polled handshaking and supports a programmable clock rate when operating in Master mode. The I2C-bus signals are available through the VMIVME-7750’s E17 header as shown in Table 3-1. The VMIVME-7750 provides termination on the I2C signals. The controller can issue interrupts to the VMIVME-7750 when handshaking on the I 2C-bus. When the I2C-bus controller drives the interrupt active, software must service and then clear the interrupt. Software can determine the cause of the interrupt by reading the bit of the status register. For more information related to programming the I2 C-bus controller, see the section “Access, Bus Interface (ACB)” in the “PC87366 128-pin LPC Super I/O with System Hardware Monitoring and MIDI and Game Ports” datasheet available from National Semiconductor. Table 3-1 I 2C-bus Through E17 Signal Name Pin +5.0V 1 I2C_SDA 2 I2C_SCL 3 GND 4 56 3 VMIVME-7750 Product Manual Embedded PCI Functions The VMIVME-7750 provides non-volatile RAM (NVRAM), Timers and a Watchdog Timer via the PCI bus. These functions are required for embedded and real time applications. The PCI configuration space of these embedded functions are shown below. The “Device ID” field indicates that the device is for VME products (00) and indicates the supported embedded feature set. The “Vender ID” and “Subsystem Vendor ID” fields indicate VMIC’s PICMG assigned Vender ID (114A). The “Subsystem ID” field indicates the model number of the product (7750). Table 3-2 PCI Configuration Space Registers 31 16 15 00 Register Address Device ID 0004 Vendor ID 114A 00h Status Command 04h Class Code Revision ID 08h BIST Header Type Latency Timer Cache Line Size 0Ch PCI Base Address 0 for Memory-Mapped VME Control registers (BAR0) 10h PCI Base Address 1 for Memory-Mapped 32kB NVRAM (BAR1) 14h PCI Base Address 2 for memory-mapped Watchdog and other timers (BAR2) 18h Reserved 1Ch Reserved 20h Reserved 24h Reserved 28h Subsystem ID 7750 Subsystem Vendor ID 114A 2Ch Reserved 30h Reserved 34h Reserved 38h Max_Lat Min_gnt Interrupt Pin Interrupt Line 3Ch 57 Timers 3 Timers General The VMIVME-7750 provides four user-programmable timers (two 16-bit and two 32-bit) which are completely dedicated to user applications and are not required for any standard system function. Each timer is clocked by independent generators with selectable rates of 2MHz, 1MHz, 500kHz and 250kHz. Each timer may be independently enabled and each is capable of generating a system interrupt on timeout. Events can be timed by either polling the timers or enabling the interrupt capability of the timer. A status register allows for application software to determine which timer is the cause of any interrupt. Timer Control Status
