IS200IVSHG1ABB工控备件机器人模块
内存可以以字节、单词或长单词的形式访问。VMIVME-7750接受一个144针SDRAM SODIMM，最大容量为512 MB。板载DRAM通过PCI到VME桥接器双端口连接到VME总线，可由本地处理器寻址，也可由另一个VMEbus主机访问VMEbus从属接口。在本地处理器和VMEbus之间共享内存时必须小心，以防止VMEbus主机覆盖本地处理器的操作系统。注意：在Windows NT 4.0中使用VMIC的IOWorks Access的Configure实用程序配置RAM时，请不要请求超过25%的物理RAM。超过25%的限制可能会导致已知的Windows NT错误，在Windows NT启动过程中会导致不可预测的行为，并需要使用紧急修复盘来恢复计算机。Windows NT 4.0 service pack级别3中存在此错误。建议紧急维修盘保持最新状态，并易于访问。VMIVME-7750包括32 KB的非易失性SRAM，CPU可以随时访问该SRAM，用于存储在断电状态下不能丢失的系统数据。注意：当零件可用时，内存容量可能会增加。39内存和端口映射2内存和端口图内存映射-基于Tundra Universe II的PCI到VMEbus桥基于TundraUniverse II接口VMIVME-7750的内存映射如表2-1所示。所有系统都共享相同的内存映射，尽管VMIVME-7750的SDRAM不足256 MB，无法填满为板上扩展内存保留的全部空间。表2-1 VMIVME-7750，基于Universe II的接口内存地址映射模式内存地址范围大小描述受保护模式$FFFF 0000-$FFFF FFFF 64 KB ROM BIOS映像$0400 0000-$FFE FFFF 3.9 GB未使用*$0010 0000-$0FFF FFFF 255 MB保留用于**板上扩展内存（未在所有系统上填充）真实模式$E0000-$FFFFF 128 KB ROM BIOS$D8018-$DFFFF 32 KB保留$D8016-$D8017 2字节板ID寄存器（0x7750）$D8014-$D8015 2字节VMEBERR地址修改寄存器$D8010-$D8013 2字节MEBERR地址寄存器$D800E-$D800F 2字节系统COMM寄存器$D8000-$D800 D 14字节保留$C8000-$D7FFF 64 KB LANWorks BIOS$C000-$C7FFF 32 KB视频ROM$A0000-$BFFFF 128 KB视频RAM$000000-$9FFFF 640 KB用户RAM/DOS RAM*此空间可用于设置保护模式PCI到VMEbus窗口（也称为PCI从属映像）。BIOS还将在该区域映射基于PCI的板载NVRAM、计时器和看门狗计时器。**该空间可以分配为共享内存（例如，在基于奔腾处理器的CPU和VMEbus Master之间）。请注意，如果加载了PMC板，则扩展BIOS可能位于该区域。40 2 VMIVME-7750产品手册I/O端口映射与桌面系统一样，VMIVME-7720包含特殊的输入/输出指令，用于访问驻留在I/O寻址空间（与内存寻址空间分离且不同）中的I/O外围设备。I/O地址空间中的位置称为端口。当CPU解码并执行I/O指令时，它在线A00至A15上产生一个16位I/O地址，并用M/I/O控制线识别I/O周期。因此，CPU包括一个独立的64Kbyte I/O地址空间，它可以作为字节、字或长字访问。标准硬件电路仅为外围设备保留1024字节的I/O寻址空间，从I/O$000到$3FF。所有标准的PC I/O外围设备，如串行和并行端口、硬盘和软盘驱动器控制器、视频系统、实时时钟、系统计时器和中断控制器，都位于该I/O空间区域。BIOS正确初始化和配置所有这些寄存器；通常不需要直接调整这些I/O端口。分配的和用户可用的I/O地址汇总在I/O地址映射表2-2中。表2-2 VMIVME-7750 I/O地址映射I/O地址范围大小BYTES HW DEVICE PC/AT FUNCTION$000-$00F 16 DMA控制器1（Intel 8237A兼容）$010-$01F 16保留$020-$021 2主中断控制器（Intel 8259A兼容）$022-$03F 30保留$040-$043 4可编程定时器（Intel 8254兼容）$044-$05F 30保留$060-$064 5键盘、扬声器、，系统配置（Intel 8042兼容）$065-$06F 11保留$070-$071 2实时时钟$072-$07F 14保留$080-$08F 16 DMA页寄存器$090-$091 2保留$092 1备用。门A20/快速复位寄存器$093-$09F 11保留41 I/O端口映射2$0A0-$0A1 2从属中断控制器（Intel 8259A兼容）$0A2-$0BF 30保留$0C0-$0DF 32 DMA控制器2（Intel 8237A兼容）$0E0-$16F 142保留$170-$177 8 ICH2辅助硬盘控制器$178-$1EF 120用户I/O$1F0-$1F7 8 ICH2主硬盘控制器$1F8-$277 128用户I/O$278-$27F 8 I/O芯片*LPT2并行I/O*$280-$2E7 104储备
Memory can be accessed as bytes, words or longwords. The VMIVME-7750 accepts one 144-pin SDRAM SODIMM for a maximum capacity of 512 Mbytes. The on-board DRAM is dual-ported to the VME bus through the PCI-to-VME bridge and is addressable by the local processor, as well as the VMEbus slave interface by another VMEbus master. Caution must be used when sharing memory between the local processor and the VMEbus to prevent a VMEbus master from overwriting the local processor’s operating system. NOTE: When using the Configure utility of VMIC’s IOWorks Access with Windows NT 4.0 to configure RAM, do not request more than 25 percent of the physical RAM. Exceeding the 25 percent limit may result in a known Windows NT bug that causes unpredictable behavior during the Windows NT boot sequence, and requires the use of an emergency repair disk to restore the computer. The bug is present in Windows NT 4.0 service pack level 3. It is recommended that an emergency repair disk be kept up-to-date and easily accessible. The VMIVME-7750 includes 32 Kbyte of non-volatile SRAM which can be accessed by the CPU at any time, and is used to store system data that must not be lost during power-off conditions. NOTE: Memory capacity may be extended as parts become available. 39 Memory and Port Maps 2 Memory and Port Maps Memory Map - Tundra Universe II-Based PCI-to-VMEbus Bridge The memory map for the Tundra Universe II-based interface VMIVME-7750 is shown in Table 2-1. All systems share this same memory map, although a VMIVME-7750 with less than the full 256 Mbyte of SDRAM does not fill the entire space reserved for On-Board Extended Memory. Table 2-1 VMIVME-7750, Universe II-Based Interface Memory Address Map MODE MEMORY ADDRESS RANGE SIZE DESCRIPTION PROTECTED MODE $FFFF 0000 - $FFFF FFFF 64 Kbyte ROM BIOS Image $0400 0000 - $FFFE FFFF 3.9 Gbyte Unused * $0010 0000 - $0FFF FFFF 255 Mbyte Reserved for ** On-Board Extended Memory (not filled on all systems) REAL MODE $E0000 - $FFFFF 128 Kbyte ROM BIOS $D8018 - $DFFFF 32 Kbyte Reserved $D8016 - $D8017 2 bytes Board ID Register (0x7750) $D8014 - $D8015 2 bytes VMEBERR Address Modifier Register $D8010 - $D8013 2 bytes MEBERR Address Register $D800E - $D800F 2 bytes System COMM Register $D8000 - $D800D 14 bytes Reserved $C8000 - $D7FFF 64 Kbyte LANWorks BIOS $C0000 - $C7FFF 32 Kbyte Video ROM $A0000 - $BFFFF 128 Kbyte Video RAM $00000 - $9FFFF 640 Kbyte User RAM/DOS RAM * This space can be used to set up protected mode PCI-to-VMEbus windows (also referred to as PCI slave images). BIOS will also map on-board PCI based NVRAM, Timers and Watchdog Timers in this area. ** This space can be allocated as shared memory (for example, between the Pentium processor-based CPU and VMEbus Master). Note that if a PMC board is loaded, the expansion BIOS may be placed in this area. 40 2 VMIVME-7750 Product Manual I/O Port Map Like a desktop system, the VMIVME-7750 includes special input/output instructions that access I/O peripherals residing in I/O addressing space (separate and distinct from memory addressing space). Locations in I/O address space are referred to as ports. When the CPU decodes and executes an I/O instruction, it produces a 16-bit I/O address on lines A00 to A15 and identifies the I/O cycle with the M/I/O control line. Thus, the CPU includes an independent 64 Kbyte I/O address space, which is accessible as bytes, words or longwords. Standard hardware circuitry reserves only 1,024 byte of I/O addressing space from I/O $000 to $3FF for peripherals. All standard PC I/O peripherals, such as serial and parallel ports, hard and floppy drive controllers, video system, real-time clock, system timers and interrupt controllers are addressed in this region of I/O space. The BIOS initializes and configures all these registers properly; adjusting these I/O ports directly is not normally necessary. The assigned and user-available I/O addresses are summarized in the I/O Address Map, Table 2-2. Table 2-2 VMIVME-7750 I/O Address Map I/O ADDRESS RANGE SIZE IN BYTES HW DEVICE PC/AT FUNCTION $000 - $00F 16 DMA Controller 1 (Intel 8237A Compatible) $010 - $01F 16 Reserved $020 - $021 2 Master Interrupt Controller (Intel 8259A Compatible) $022 - $03F 30 Reserved $040 - $043 4 Programmable Timer (Intel 8254 Compatible) $044 - $05F 30 Reserved $060 - $064 5 Keyboard, Speaker, System Configuration (Intel 8042 Compatible) $065 - $06F 11 Reserved $070 - $071 2 Real-Time Clock $072 - $07F 14 Reserved $080 - $08F 16 DMA Page Registers $090 - $091 2 Reserved $092 1 Alt. Gate A20/Fast Reset Register $093 - $09F 11 Reserved 41 I/O Port Map 2 $0A0 - $0A1 2 Slave Interrupt Controller (Intel 8259A Compatible) $0A2 - $0BF 30 Reserved $0C0 - $0DF 32 DMA Controller 2 (Intel 8237A Compatible) $0E0 - $16F 142 Reserved $170 - $177 8 ICH2 Secondary Hard Disk Controller $178 - $1EF 120 User I/O $1F0 - $1F7 8 ICH2 Primary Hard Disk Controller $1F8 - $277 128 User I/O $278 - $27F 8 I/O Chip* LPT2 Parallel I/O* $280 - $2E7 104 Reserved $2E8 - $2EE 7 UART* COM4 Serial I/O* $2EF - $2F7 9 User I/O $2F8 - $2FE 7 Super-I/O Chip COM2 Serial I/O (16550 Compatible) $2FF - $36F 113 Reserved $370 - $377 8 Super-I/O Chip Secondary Floppy Disk Controller $378 - $37F 8 Super-I/O Chip* LPT1 Parallel I/O* $380 - $3E7 108 Reserved $3E8 - $3EE 7 UART* COM3 Serial I/O* $3F0 - $3F7 8 Super-I/O Chip Primary Floppy Disk Controller $3F8 - $3FE 7 Super-I/O Chip COM1 Serial I/O (16550 Compatible) $3FF - $4FF 256 Reserved $500 - CFF 2048 Reserved * While these I/O ports are reserved for the listed functions, they are not implemented on the VMIVME-7750. They are listed here to make the user aware of the
