IS200IGDMH1B机械备件
与传输相关联的用户信号可以未经修改地跨互连传输。对于由互连修改的传输，本节中的信息为生成与生成的传输相关的用户信号提供了指南。当单个传输转换为多个传输时：•原始传输的HAUSER信号复制到每个生成的传输中。•对于包含原始传输的某些数据字节的每个生成传输，生成传输的HWUSER和HRUSER信号使用传输中包含的数据字节的User位。当多个传输转换为单个传输时：•第一次传输的HAUSER信号用于生成生成传输的HAUSE信号。丢弃后续传输的HAUSER信号。•生成传输的HWUSER和HRUSER信号使用原始传输中相关数据字节的组合用户位。10用户信令10.2用户信号互连建议10-82版权所有ARM Limited或其附属公司。保留所有权利。ARM IHI 0033B.b非机密ID102715 ARM IHI 0023B.b版权所有ARM Limited或其附属公司。保留所有权利。A-83 ID102715非保密附录A修订本附录描述了本规范发布版本之间的技术变更。表A-1问题A变更位置影响首次发布。−−表A-2问题A和问题B变更位置之间的差异影响描述修订的附加章节，包括新属性、澄清和建议。第1-17页AHB修订。所有版本HPROT[3:0]保护控制信号的澄清。主信号见第2-21页。所有修订HPROT[6:4]信号的附加表条目，添加扩展内存类型。仅适用于本规范B版。主信号见第2-21页。所有修订安全传输所需的HNONSEC信号的附加表条目。主信号见第2-21页。所有版本独家传输所需HEXCL和HMASTER[3:0]信号的附加表格条目。主信号见第2-21页。所有版本描述独占传输所需HEXOKAY信号的附加表格条目。第2-23页上的从属信号。所有修订关于使用HMASTLOCK进行IDLE传输的更多详细信息。第3-32页锁定传输。所有修订版附录A修订版A-84版权所有ARM Limited或其附属公司。保留所有权利。ARM IHI 0033B.b非机密ID102715描述AHB5扩展内存类型的附加部分。第3-45页的内存类型。所有修订版描述AHB5安全传输的附加部分。第3-50页上的安全传输。所有版本描述AHB5多从选择的附加章节。第4-53页上的多个从属选择。所有修订说明AHB5 Endian属性的附加部分。第6-61页的结尾。所有修订说明AHB5独家转让的附加章节。第8章独家转让。所有修订说明AHB5 Stable_Between_Clock属性的附加部分。时钟见第7-68页。所有修订说明AHB5原子性的附加章节。第9章原子性。所有其他修订
he User signals associated with the transfer can be transported across the interconnect unmodified. For transfers that are modified by the interconnect, the information in this section provides guidelines for the generation of User signals associated with generated transfers. Where a single transfer is converted to multiple transfers: • The HAUSER signal of the original transfer is replicated into each generated transfer. • For each generated transfer that contains some of the data bytes of the original transfer, the HWUSER and HRUSER signals of the generated transfer use the User bits for the data bytes contained in the transfer. Where multiple transfers are converted to a single transfer: • The HAUSER signal of the first transfer is used to generate the HAUSER signal of the generated transfer. The HAUSER signals of subsequent transfers are discarded. • The HWUSER and HRUSER signals for the generated transfer use the combined User bits for the associated data bytes in the original transfers. 10 User Signaling 10.2 User signal interconnect recommendations 10-82 Copyright ARM Limited or its affiliates. All rights reserved. ARM IHI 0033B.b Non-Confidential ID102715 ARM IHI 0033B.b Copyright ARM Limited or its affiliates. All rights reserved. A-83 ID102715 Non-Confidential Appendix A Revisions This appendix describes the technical changes between released issues of this specification. Table A-1 Issue A Change Location Affects First release. − − Table A-2 Differences between issue A and issue B Change Location Affects Additional section describing revisions, which include new properties, clarifications and recommendations. AHB revisions on page 1-17. All revisions Clarification of the HPROT[3:0] protection control signal. Master signals on page 2-21. All revisions Additional table entry for the HPROT[6:4] signal that adds extended memory types. Applicable only to Issue B of this specification. Master signals on page 2-21. All revisions Additional table entry for the HNONSEC signal required for Secure transfers. Master signals on page 2-21. All revisions Additional table entries for the HEXCL and HMASTER[3:0] signals required for Exclusive Transfers. Master signals on page 2-21. All revisions Additional table entry describing the HEXOKAY signal required for Exclusive Transfers. Slave signals on page 2-23. All revisions Additional details on the use of HMASTLOCK for IDLE transfers. Locked transfers on page 3-32. All revisions Appendix A Revisions A-84 Copyright ARM Limited or its affiliates. All rights reserved. ARM IHI 0033B.b Non-Confidential ID102715 Additional section that describes AHB5 Extended Memory Types. Memory types on page 3-45. All revisions Additional section that describes AHB5 Secure Transfers. Secure transfers on page 3-50. All revisions Additional section that describes AHB5 Multiple Slave Select. Multiple slave select on page 4-53. All revisions Additional section that describes the AHB5 Endian property. Endianness on page 6-61. All revisions Additional chapter that describes AHB5 Exclusive Transfers. Chapter 8 Exclusive Transfers. All revisions Additional section that describes the AHB5 Stable_Between_Clock property. Clock on page 7-68. All revisions Additional chapter that describes AHB5 Atomicity. Chapter 9 Atomicity. All revisions Additional
