IS200VRTDH1D工控模块控制器
正向电压
它的额定值为8A平均正向电流和35V反向电压。3A时的典型正向电压为0.4V。二极管仅在断开时间内传导电流。升压转换器的峰值反向电压等于调节器输出电压。正常运行时的平均正向电流等于输出电流。频率补偿环路频率补偿通过串联RC网络对误差放大器（VC引脚）的输出进行。主极由串联电容器和输出阻抗构成(≈50万Ω) 误差放大器。极点在2Hz至20Hz的范围内。串联电阻器在1kHz至5kHz时产生“零”，从而提高回路稳定性和瞬态响应。第二个电容器，通常是主补偿电容器大小的十分之一，有时用来减少VC管脚上的开关频率波动。
VC引脚纹波
是由输出分压器衰减的输出电压纹波和误差放大器相乘引起的。如果没有第二个电容器，VC管脚纹波为：VC管脚波纹=VRIPPLE=输出纹波（VP–P）gm=误差放大器跨导(≈1500µmho）RC=VC引脚上的串联电阻器VOUT=直流输出电压1.245（VRIPPLE）（gm）（RC）（VOUT）为防止不规则切换，VC引脚纹波应保持在50mVP–P以下。最坏情况下，VC引脚纹波发生在最大输出负载电流下，如果使用质量差（高ESR）的输出电容器，纹波也会增加。在VC引脚上添加0.0047µF电容器，可将开关频率纹波降至几毫伏。RC的低值也将减少VC引脚纹波，但环路相位裕度可能不足。
Forward voltage
Its rating is 8A average forward current and 35V reverse voltage. The typical forward voltage at 3A is 0.4V. The diode conducts current only during the off time. The peak reverse voltage of the boost converter is equal to the regulator output voltage. The average forward current during normal operation is equal to the output current. The frequency compensation loop is used to compensate the output of the error amplifier (VC pin) through a series RC network. The main pole consists of a series capacitor and an output impedance (≈ 500000 Ω) error amplifier. The poles are in the range of 2Hz to 20Hz. The series resistor produces "zero" at 1kHz to 5kHz, thus improving the loop stability and transient response. The second capacitor, usually one tenth of the size of the main compensation capacitor, is sometimes used to reduce the switching frequency fluctuation on the VC pin.
VC pin ripple
It is caused by multiplication of the output voltage ripple attenuated by output voltage divider and error amplifier. If there is no second capacitor, the ripple of VC pin is: VC pin ripple=VRIPPLE=output ripple (VP – P) gm=transconductance of error amplifier (≈ 1500 µ mho) RC=series resistor VOUT on VC pin=DC output voltage 1.245 (VRIPPLE) (gm) (RC) (VOUT) To prevent irregular switching, the ripple of VC pin should be kept below 50mVP – P. In the worst case, the ripple of VC pin occurs at the maximum output load current. If the output capacitor with poor quality (high ESR) is used, the ripple will also increase. Adding 0.0047 µ F capacitor to VC pin can reduce the switching frequency ripple to several millivolts. The low value of RC will also reduce the ripple of VC pin, but the loop phase margin may be insufficient.
