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INTELLIX MO150变压监测器
设置从属映像时，地址和其他参数应首先设置。只有正确设置VMEbus从属映像后，才应：将启用VMEbus从映像。如果要重新映射从属映像，请先禁用从属映像，然后重置地址。之后映像配置正确，请重新启用映像。VMEbus从循环成为PCI总线上的主循环。PCI总线仲裁器是Intel 82443BX芯片。它在各种PCI主机、CPU和PCI总线是IDE总线主控控制器。由于无法重试VMEbus，因此必须允许处理所有VMEbus从属周期。当PCI循环到PCI从映像正在进行，而VMEbus从映像循环到板载DRAM正在进行中。PCI周期不会放弃PCI总线和VMEbus从设备循环不会放弃VMEbus，导致XVME-660死锁。如果XVME-660将同时用作主设备和从设备，VMEbus主设备在启动VMEbus循环之前，循环必须获得VMEbus。
所有VMEbus从接口周期都进行字节交换，以保持地址一致性。对于有关Xycom自动化软件、可选字节交换硬件的更多信息关于XVME-660，请参阅第74页。
VMEbus中断处理
XVME-660可以服务于VME IRQ[7:1]。宇宙芯片中的寄存器启用
XVME-660将服务的中断级别。当断言VMEbus IRQ时，宇宙请求VMEbus并生成IACK循环。一旦IACK
循环完成后，生成PCI总线中断，以允许正确的中断服务
要执行的例程（ISR）。尽管Universe连接到所有四个PCI总线中断，但为了保持单功能设备的PCI兼容性，仅使用PIRQA。其他PCI总线设备可以共享这些中断。BIOS映射宇宙PCI总线中断到IRQ9上的AT总线中断控制器。由于PCI设备共享中断线，所有ISR例程必须准备好链中断向量以允许服务其他设备。
VMEbus中断生成
XVME-660可以在所有七个级别上生成VMEbus中断。有一个独特的与每个级别关联的状态/ID。高位在状态/ID中编程登记如果中断源是软件中断，则清除最低位，并且为所有其他中断源设置。有关更深入的解释，请参阅《宇宙手册》。VMEbus重置选项当切换前面板复位开关时，XVME-660可执行以下操作
重置选项：
1.仅重置VME背板。
2.仅重置XVME-660 CPU。
3.重置两者。
4.重置两者。
有关如何配置重置选项的信息，请参阅第14页的开关设置。
When setting up slave images, the address and other parameters should
be set first. Only after the VMEbus slave image is set up correctly should
the VMEbus slave image be enabled. If a slave image is going to be remapped, disable the slave image first, and then reset the address. After
the image is configured correctly, re-enable the image.
The VMEbus slave cycle becomes a master cycle on the PCI bus. The PCI bus arbiter is
the Intel 82443BX chip. It arbitrates between the various PCI masters, the CPU, and the
PCI bus IDE bus mastering controller. Because the VMEbus cannot be retried, all VMEbus slave cycles must be allowed to be processed. This becomes a problem when a PCI
cycle to a PCI slave image is in progress while a VMEbus slave cycle to the onboard
DRAM is in progress. The PCI cycle will not give up the PCI bus and the VMEbus slave
cycle will not give up the VMEbus, causing the XVME-660 to become deadlocked. If the
XVME-660 is to be used as a master and a slave at the same time, the VMEbus master
cycles must obtain the VMEbus prior to initiating VMEbus cycles.
All VMEbus slave interface cycles are byte-swapped to maintain address coherency. For
more information on the Xycom Automation software selectable byte-swapping hardware
on the XVME-660, refer to p. 74.
VMEbus Interrupt Handling
The XVME-660 can service VME IRQ[7:1]. A register in the Universe chip enables the
interrupt levels that will be serviced by the XVME-660. When a VMEbus IRQ is asserted, the Universe requests the VMEbus and generates an IACK cycle. Once the IACK
cycle is complete, a PCI bus interrupt is generated to allow the proper Interrupt Service
Routine (ISR) to be executed. Although, the Universe connects to all four PCI bus interrupts, only PIRQA is used in order to maintain PCI compatibility for single-function devices. Other PCI bus devices may share these interrupts. The BIOS maps the Universe
PCI bus interrupts to the AT-bus interrupt controller on IRQ9.
Because the PCI devices share interrupt lines, all ISR routines must be prepared to chain
the interrupt vector to allow the other devices to be serviced.
VMEbus Interrupt Generation
The XVME-660 can generate VMEbus interrupts on all seven levels. There is a unique
STATUS/ID associated with each level. Upper bits are programmed in the STATUS/ID
register. The lowest bit is cleared if the source of the interrupt is a software interrupt, and
set for all other interrupt sources. Consult the Universe manual for a more in-depth explanation.VMEbus Reset Options
When the front panel Reset switch is toggled, the XVME-660 can perform the following
reset options:
1. Reset the VME backplane only.
2. Reset the XVME-660 CPU only.
3. Reset both.
4. Reset neither.
See Switch Settings on p. 14 for information on how to configure the Reset options.
