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8811-IO-DC-01燃机模块
VMEbus从接口XVME-660通过访问VMEbus从映像或通过DMA通道启动事务。有八个PCI从映像。从属映像15具有4kb分辨率；其他（2-4、6-8）的分辨率为64KB。奴隶形象1到8已经在XVME-660上实现，A24或A32个VMEbus循环。
XVME-660 BIOS从机1对应于Tundra Universe从机0直到对应于宇宙从机7的BIOS从机8。
地址模式和类型基于VMEbus从映像进行编程。VMEbus从循环的VMEbus内存地址位置由基本和指定绑定地址。PCI地址通过将基地址添加到转换偏移地址来计算。转换地址的设置取决于从机编号和BIOS设置。有三种情况：从设备3-8：当宇宙芯片通电时，转换地址默认为零骑自行车。对转换地址的任何更改都会在电源循环时丢失。
从机1-2，BIOS引导菜单从机1和2操作模式设置为可编程：BIOS在启动时将转换地址设置为零。翻译有任何变化吗地址在任何启动时都会被零覆盖。
从机1-2，BIOS引导菜单从机1和2操作模式设置为兼容：转换地址由BIOS设置。
第一个VMEbus从映像将基本和绑定寄存器设置为640KB
通过BIOS。例如：VMEbus从映像0:BS=0000000 h BD=A0000h至=0000000 h
第二个VMEbus从映像将使基寄存器设置为连续BIOS使用来自第一VMEbus从映像的绑定寄存器。
界限寄存器受总XVME-660 DRAM限制。
翻译偏移寄存器为：偏移量为384 KB，相当于
XVME-660板。例如：VMEbus从映像1:BS=A0000h BD=400000h至=060000h
笔记有关更改转换地址的信息，请参阅Universe芯片手册和PCI总线规范。
XVME-660 DRAM内存基于PC架构，不连续。
可以设置VMEbus从映像以允许该DRAM显示为一个连续块。如果VMEbus从映像窗口始终配置有1 MB的平移偏移量。来自用户和软件从观点来看，这是可取的，因为中断向量表、系统参数和通信缓冲器（键盘）放置在低DRAM中。这提供了更多的系统保护
VMEbus Slave Interface
The XVME-660 acts as a VMEbus slave by accessing a VMEbus slave image or by the
DMA channel initiating a transaction. There are eight PCI slave images. Slave images 1
and 5 have a 4 KB resolution; the others (2-4, 6-8) have a 64 KB resolution. Slave images
1 through 8 have been implemented on the XVME-660. The slave can respond to A16,
A24, or A32 VMEbus cycles.
Note
XVME-660 BIOS Slave 1 corresponds to Tundra Universe Slave 0 and
so on, up to BIOS Slave 8 corresponding to Universe Slave 7.
The address mode and type are programmed on a VMEbus slave image basis. The VMEbus memory address location for the VMEbus slave cycle is specified by the base and
bound address. The PCI address is calculated by adding the base address to the translation offset address. The translation address is set differently depending on the Slave number and on the BIOS settings. There are three cases:
Slaves 3-8: The translation address defaults to zero when the Universe chip is power
cycled. Any changes to the translation address are lost on power cycling.
Slave 1-2, BIOS Boot menu Slave 1 & 2 Operational Mode set to Programmable: The
BIOS sets the translation address to zero on boot up. Any changes to the translation
address are overwritten with a zero on any boot.
Slave 1-2, BIOS Boot menu Slave 1 & 2 Operational Mode set to Compatible: The translation address is set by the BIOS.
The first VMEbus slave image will have the base and bound register set to 640 KB
by the BIOS. For example:
VMEbus Slave Image 0: BS= 0000000h BD= A0000h TO = 0000000h
The second VMEbus slave image will have the base register set to be contiguous
with the bound register from the first VMEbus Slave image by the BIOS. The bound
register is limited by the total XVME-660 DRAM. The translation offset register is
offset by 384 KB, which is equivalent to the A0000h-FFFFFh range on the
XVME-660 board. For example:
VMEbus Slave Image 1: BS=A0000h BD= 400000h TO = 060000h
Note
For information on changing the translation addresses, see the Universe
chip manual and the PCI bus specification.
The XVME-660 DRAM memory is based on the PC architecture and is not contiguous.
The VMEbus slave images may be set up to allow this DRAM to appear as one contiguous block.
Mapping defined by the PC architecture can be overcome if the VMEbus slave image
window is always configured with a 1 MB translation offset. From a user and software
standpoint, this is desirable because the interrupt vector table, system parameters, and
communication buffers (keyboard) are placed in low DRAM. This provides more system protection.
