3BHE028761R0101使用教程，ABB卡件
通道定序器和双端口寄存器控制当VMIVME-3112在任何扫描模式下运行时，操作由车载通道定序器控制。例如当电路板通电时，转换序列从通道00开始如第3.5.1节所述。A/D转换完成后，双端口控制逻辑接收转换后的数据并将其存储在该通道的适当的双端口寄存器。通道计数器增加1，选择下一个多路复用到ADC的通道。
3BHE028761R0101使用教程同时选择下一个通道，启动新的a/D转换序列。什么时候所有输入通道均已转换和存储，通道计数器已重置至“零”，并再次启动通道扫描序列（自动扫描仅模式）可编程间隔计时器三重16位计时器（可级联至48位）可编程为触发ADC扫描序列的开始。例如，可能需要每秒只更新一次数字化数据。董事会可以设置为扫描中断模式。计时器将被设置为生成每秒脉冲一次。该脉冲将启动ADC扫描序列。
一旦所有通道数字化并存储，扫描结束中断将生成到CPU以指示数据可用。中断服务例程将数据读入内存，然后重新初始化总线下一个中断的中断器模块（BIM）。
3.10总线断路器模块（BIM）MC68153 BIM处理与VMEbus的所有中断接口。一中断可以在任何VMEbus级别（1到7）上生成。取决于在所使用的模式下，可以在完成单个A/D转换，或在完成16到64通道扫描时。BIM在生成一个中断请求，并响应来自CPU板。在680X0 CPU中，该8位向量乘以4计算出的地址加上VBR（矢量基址寄存器）指向该位置用于读取ADC数字化数据的中断服务例程。中断程序示例见第4节。如果VMIVME-3112和背板上可能需要CPU和IACK跳线
CHANNEL SEQUENCER AND DUAL PORT REGISTER CONTROL
When the VMIVME-3112 is operated in any of the scanning modes,
the operation is controlled by an on-board channel sequencer. For example,
when the board is powered-on, a conversion sequence begins at Channel 00
as discussed in Section 3.5.1. Once the A/D conversion is completed, the dual
port control logic takes the converted data and stores it in that channel's
appropriate dual port register. The channel counter is incremented by one,
which selects the next channel to be multiplexed to the ADC. Concurrently with
selecting the next channel, a new A/D conversion sequence is initiated. When
all input channels have been converted and stored, the channel counter is reset
to "zero" and starts the channel scanning sequence again (AUTO SCANNING
MODE only)PROGRAMMABLE INTERVAL TIMER
A triple, 16-bit timer (cascadeable to 48 bits) may be programmed to
trigger the start of an ADC scan sequence. For example, it might be required to
get updated digitized data only once every second. The board could be set for
the SCANNING INTERRUPT MODE. The timer would be set to generate a
pulse once every second. That pulse would initiate the ADC scan sequence.
Once all channels are digitized and stored, an end of scan interrupt would be
generated to the CPU to indicate that data is available. The interrupt service
routine would read the data into memory and then re-initialize the Bus
Interrupter Module (BIM) for the next interrupt.
3.10 BUS INTERRUPTER MODULE (BIM)
An MC68153 BIM handles all interrupt interfacing to the VMEbus. An
interrupt may be generated on any VMEbus level (1 through 7). Depending on
the mode used, an interrupt may be generated upon the completion of a single
A/D conversion, or upon the completion of a 16- through 64-channel scan.
The BIM generates an 8-bit vector (D08(O)) after generating an
Interrupt Request and in response to the Interrupt Acknowledge cycle from the
CPU board. This 8-bit vector is multiplied by four in the 680X0 CPU and this
calculated address plus the VBR (Vector Base Register) points to the location
of the interrupt service routine to read the ADC digitized data. An interrupt
program example is found in Section 4. If there are empty backplane slots between the VMIVME-3112 and
the CPU, then IACK jumpers may be needed on the backplane
