GDC806A0101使用配置手册,ABB模块
个多路复用器接受八个差分输入对。第二层多路复用器从八个输入多路复用器中的一个接收所选通道。两个多路复用器部分由同一组六个地址控制线路（INP MUX地址），从控制位“MUX A00”到控制寄存器中的“MUX A05”。3.6.2单端与差动操作模拟输入的差分或单端操作通过以下方式选择：单个串联封装（SIP）电阻器的位置，如所示图3.6.1-1。输入多路复用器始终在差分模式下工作；通过连接低输入电阻至公共输入接地感应输入，而不是至单个低信号输入。
GDC806A0101使用配置手册防止高频噪声成为共模信号并且使VMIVME-3112的数据输出波动，输入电路是单端制造，所有C行引脚均接地。这意味着所有示意图中的RFILT电阻器SIP替换为SIP头。这些是基本上为0Ω SIP电阻器。还安装了跨接导线J2。现在所有的输入通过低电阻路径将其回路连接到本地接地。这也改变了输入滤波器的极点频率，因为一半的输入电阻消失了。新的频率是微分值的两倍。
所有VMIVME-3112输入通道均由限流输入电阻器进行过电压保护。输入过电压见第2节第2.3段规范。3.7跳线可编程增益放大器一旦选择输入通道并通过输入通道布线多路复用器，它进入可编程增益放大器作为差分输入。这个差分放大器抑制共模噪声，并向跟踪保持（T&H）设备提供缩放单端输出。可编程增益放大器可以跨接增益为1、10、100、200和500。这允许-10 mV至+10 mV范围内的输入将被放大至-5 V至+5 V输入范围用于ADC。当选择增益500时，CSR中的增益删除位（D15）必须设置。这将模拟采集时间从15µs增加到28µs，以允许完成新通道的输入设置。图3.7-1显示了增益可编程增益放大器的配置。
Each multiplexer accepts eight differential input pairs. A second tier
multiplexer receives the selected channel from one of the eight input multiplexers.
Both multiplexer sections are controlled by the same set of six address
lines (INP MUX ADDRESS), which are derived from control bits "MUX A00" through
"MUX A05" from the Control Register.
3.6.2 Single-Ended Versus Differential Operation
Differential or single-ended operation of the analog inputs is selected by
the location of single-in-line-package (SIP) resistors, as illustrated in
Figure 3.6.1-1. The input multiplexers are always operated in the differential mode; single-ended (pseudo-differential) operation is obtained by connecting the
LOW input resistor to the common INPUT GROUND SENSE input instead of to the
individual LOW signal inputs.
To prevent high frequency noise from becoming a common mode signal
and causing the data output of the VMIVME-3112 to fluctuate, the input circuits are
made single-ended and all of the row C pins are grounded. This means that all of
the RFILT resistor SIPs in the schematic are replaced with SIP headers. These are
essentially 0 Ω SIP resistors. Jumper J2 is also installed. Now all of the inputs
have their returns tied to local ground via a low resistance path. This also shifts the
pole frequency of the input filter, since half of the input resistance is gone. The new
frequency is twice that of the differential value.
All VMIVME-3112 input channels are overvoltage protected by currentlimiting input resistors. See Section 2, paragraph 2.3 for input overvoltage
specifications.
3.7 JUMPER-PROGRAMMABLE GAIN AMPLIFIER
Once an input channel has been selected and routed through the input
multiplexers, it enters the Programmable Gain Amplifier as a differential input. The
differential amplifier rejects COMMON MODE noise and delivers a scaled singleended output to the Track-and-Hold (T&H) device. The Programmable Gain
Amplifier may be jumpered for gains of 1, 10, 100, 200, and 500. This allows for an
input in the -10 mV to +10 mV range to be scaled up to a -5 V to +5 V input range
for the ADC. When a gain of 500 is selected the GAIN DEL bit (D15) in the CSR
must be set. This increases the analog acquisition time from 15 µs to 28 µs to allow
complete input setting for the new channel. Figure 3.7-1 shows the gain
configuration for the Programmable Gain Amplifier.
